Research & Publications
Prof. Prasad Khandekar has published two Patents, numerous research papers in various peer reviewed international journals and international conferences. He has also authored 8 text books at national level.
Some Stats
1
Copyrights
4
Patents Granted
1Patents Published
5
Ongoing MOU Activities
27+
Years of Experience
110+
Projects guided and worked on
Silicon Chip
Patented PAL2NSM Logic Style is fabricated on silicon chip at Semiconductor Laboratory, Department of Space, Chandigarh, India
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Authors: Prof. Prasad KhandekarApplication No.: -
Patent No.: -
Dated: -
GOI patent Journal
Patents Granted
Pass Transistor Adiabatic Circuit with Stand-By Mode (PAL2NSM) Logic Style
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Authors: Prof. Prasad KhandekarApplication No.: 2315/MUM/2011
Patent No.: 353941
Dated: 17/12/2020.
GOI patent Journal
Australian Patent “A Boundary Circuit For Interfacing An Adiabatic Circuit With A CMOS Circuit”
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Authors: Prof. Prasad KhandekarPatent No.: 2021106257
Dated: 20/08/2021
Australian Government IP Australia
Australian Patent “A Brain Signal Controlled Intelligent Wheelchair with Augmented Reality”
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Authors: Prof. Prasad KhandekarPatent No.: 2021106262
Dated: 20/08/2021
Australian Government IP Australia
Australian Patent “FPGA Custom Overly Meant for Compute Intensive Blocks of JPEG Compression”
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Authors: Prof. Prasad KhandekarPatent No.: 2021107106
Dated: 08/12/2021
Australian Government IP Australia
Patents Published
Digital System for Sorting of Objects
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Authors: Prof. Prasad KhandekarApplication No.: Filed
Patent Application No.: 201621038636
Dated: 11/11/2016.
GOI patent Journal
Research Publications
Journal Publications
- P D Khandekar et al, “Multi-channel programmable power supply with temperature compensation for silicon sensors”, Review of Scientific Instruments (Vol.87, Issue 1), DOI: 10.1063/1.4940424.
- P D Khandekar et al, “Optimal Conditions for Ultra Low Power Digital Circuits”,Journal of Active and Passive Electronic Device, USA, 2011, Vol 6, pp 157-167
- P D Khandekar et al, “Low power Digital Design Using Energy-Recovery Adiabatic Logic”, International Journal of Engineering Research and Industrial Applications, pp 199-208, 2008.
- P D Khandekar, S Subbaraman, and R S Talware, “Ultra-Low Power Quasi- Adiabatic Inverter”, International Journal of Computational Intelligence Research & Applications, presented in ICVCom’09, SAINTGITS COE, Kottayam, Kerala, 16- 18 April 2009, Vol.3, No.1, Jan-Jun 2009, pp 11-15.
- P D Khandekar, S Subbaraman, Manish Patil, and Abhijit Chitre,"Low Power Inverter and Barrel Shifter Design Using Adiabatic Principle", Advances in Computational Sciences and Technology (ACST), Vol. 3, No. 1 (2010), pp 57-65.
- R Shukla, P Rakshe, S Lokhandwala, S Dugad, P Khandekar, C Garde, S Gupta, “A Survey of Power Supply Techniques for Silicon Photo-multiplier Biasing”, International Journal of Engineering Research and General Science, Vol. 2, Issue 4, June-July 2014, pp 599-603.
- J Sarkhawas, P D Khandekar, “FPGA Based Wireless Sensor Network Node: Survey”, International Journal of VLSI and Embedded Systems-IJVES, Vol 6, Article 01526, January 2015, pp 1450-1456.
- Vedant Shukla,Prasad Khandekar, and Arti Khaparde “Analysis of Filtering Approaches to Brain MRI in Spatial Domain” International Journal of Medical Research & Health Sciences, 2021, 10(2): 63-69 ISSN No: 2319-5886
- V Shukla, P D Khandekar and A A Khaparde, “Noise Estimation in 2D MRI Using DWT Coefficients and Optimized Neural Network”, Elsevier Journal of Biomedical Signal Processing and Control, Vol 71, Part B, January 2022. Impact Factor 3.88. https://www.sciencedirect.com/science/article/pii/S1746809421008223
- V Shukla, P D Khandekar and A A Khaparde, “Restoration of Rician Corrupted MR Data Using Improved Hybrid Model” in Lecture Notes in Electrical Engineering, Vol 783, Springer, Singapore, 9 November 2021. (ICDSMLA 2020 20-21 November 2020, Pune, India.) https://link.springer.com/chapter/10.1007%2F978-981-16-3690-5_6
International Conferences - Abroad
- P D Khandekar, and S Subbaraman, “Achieving Sub-Adiabatic Energy Dissipation by Varying VBS”, International Conference ECTI-CON 09, Pattaya, Thailand, 6-8 May 2009,978-1-4244-3388-9/09 © 2009 IEEE, pp600-603.
- P D Khandekar, S Subbaraman, and Venkat R Vinjamoori, “Quasi-Adiabatic 2X2 Barrel Shifter”, Fourth IEEE International Conference ICIIS-2009, University of Peradeniya, Srilanka, 29-31 December 2009, ISBN 978-1-4244-4837-1/09, IEEE catalog number: CFP0958A
- P D Khandekar, S Subbaraman, and Achint Sharma, “Implementation and Analysis of VCO Based Power-Clock Supply Generator”, Fourth IEEE International Conference ICIIS-2009, University of Peradeniya, Srilanka, 29-31 December 2009, ISBN 978-1-4244-4837-1/09, IEEE catalog number: CFP0958A
- P D Khandekar, S Subbaraman, “Implementation and Analysis of Quasi-Adiabatic Inverters”, Proceedings of the International Conference IMECS 2010, Hongkong, 16-17 March 2010, Vol. II, pp 1348-1351
- Presentation proposal on “Preparing Purple Squirrels using Learning Analytics Tool and ABET Guidelines” in ABET 2016 Symposium at Florida, USA.
International Conferences - INDIA
- P D Khandekar et al “Optimizing 2:1 MUX for Low Power Design Using Adiabatic Logic”, International Conference on VLSI Design and Embedded Systems (ICVLSI’08), VEC, Chennai, 14-16 February 2008, pp.145-150.
- P D Khandekar, and S Subbaraman, “Implementation of Low Power 2:1 MUX for Barrel Shifter”, International Conference on Emerging Trends in Engineering and Technology (ICETET’08), G H Raisoni, Nagpur, 16-18 July 2008, 978-0-7695- 3267-7/08 © 2008 IEEE, pp 404-407
- P D Khandekar, S Subbaraman, and A. Sharma, “A VCO Based Power-Clock Supply Generator for Quasi-Adiabatic Circuits”, International Conference WECON-2009, Chitkara IET, Punjab, 23-24 October 2009, Embedded Systems Vol. II, pp 55-58
- Amit Kenjale, P D Khandekar and A V Chitre, “Design and Implementation of Power-clock Generation” is accepted by International Conference ICDCS’12, Karunya University, Coimbatore, ICDCS conference proceedings, pp 272-275, indexed by IEEExplore
- Amruta Kulkarni and P D Khandekar, “Design and Implementation of Low Power Clock Distribution Network” in International Conference ICAESM’12, EGA Pillay Engineering College, Nagapattinam, ICAESM conference proceeding, pp 761- 765, indexed by IEEExplore.
- J Sarkhawas, P D Khandekar and Amruta Kulkarni, “Variable Quality Factor JPEG Image Compression Using Dynamic Partial Reconfiguration and Microblaze” in International Conference ICCUBEA 2015, at PCCOE Pune, pp 620-624, IEEE DOI 10.1109/ICCUBEA.2015.127. This paper received “Best Paper” Award.
- S Hurdale and P D Khandekar, “Implementation of super-resolution algorithm on FPGA” in 2015 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC) 10-12 Dec 2015 at Madurai, indexed by IEEE 978- 1-4799-7848-9.
- S Desai, P D Khandekar and K J Raut, “2-D Psychoacoustic Modeling for Automatic Speech Recognition in Noisy Environment” in 2016 Conference on Advances in Signal Processing (CASP) Jun 9-11, 2016 at CCOEW, Pune, indexed by IEEE 978-1-5090-0849-0/16
- P Wane, P D Khandekar, K J Raut, H S Jatana and U Khambete, “Pass Transistor Adiabatic Logic with NMOS Pull-Down Configuration” in International Conference ICCUBEA 2016, 12-13 August 2016 at PCCOE Pune, pp xxx, IEEE DOI /ICCUBEA.2016 This paper received “Best Paper” Award.
- M Deshmukh and P D Khandekar, “Survey of Stochastic Computing for Hardware Implementation” in 3rd IEE International Conference on Recent Development in Control Automation and Power Engineering (RDCAPE) 10-11 October 2019 at Amity University, UP, India IEEE Xplore: 06 February 2020, DOI: 10.1109/RDCAPE47089.2019.8979003
- K Khairkar, P D Khandekar, U Khambete, and H S Jatana “Design of FPGA Blocks Using LTSpice®” in 5th IEE International Conference on Recent Development in Control Automation and Power Engineering (RDCAPE) 7-8 October 2019 at Amity University, UP, India. IEEE Xplore: 06 February 2020, DOI: 10.1109/RDCAPE47089.2019.8979003
National Conferences
- Prasad Khandekar et al, “Adiabatic Logic”, National conference on Recent Trends in Technology RTIT06, Jalgaon, December 2006
- Prasad Khandekar et al, “Efficiency of Adiabatic Logic for Low Power Design”, National conference on Emerging Trends in Electronics NETE06, MAE Alandi, Pune, 28th & 29th December 2006
- Prasad Khandekar et al, “Fuzzy Logic for Automatic Tuning of Myoelctric Prosthesis”, National conference on Emerging Trends in Biomedical Engineering
Books Publications
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Authors: P D Khandekar S S Kulkarni,Publication: Everest Publications
Year: 2000
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Authors: P D Khandekar S S Kulkarni,Publication: Everest Publications
Year: 2001
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Authors: P D KhandekarPublication: Nirali Publications Publications, Pune
Year: 2005
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Authors: P D KhandekarPublication: Nirali Publications Publications, Pune
Year: 2008
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Authors: P D KhandekarPublication: Nirali Publications Publications, Pune
Year: 2008
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Authors: P D Khandekar Co-AuthorPublication: Nirali Publications Publications, Pune
Year: 2008
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Authors: P D KhandekarPublication: Nirali Publications Publications, Pune
Year: 2009
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Authors: P D Khandekar Co-AuthorPublication: Nirali Publications Publications, Pune
Year: 2009